VHDL编写的16位计数器

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style='color:#111;'>39.44KB</span>","children":null,"spread":false},{"title":"counter16.tmw_info <span style='color:#111;'>304B</span>","children":null,"spread":false},{"title":"counter16.asm.qmsg <span style='color:#111;'>2.07KB</span>","children":null,"spread":false},{"title":"counter16.(0).cnf.cdb <span style='color:#111;'>569B</span>","children":null,"spread":false},{"title":"prev_cmp_counter16.asm.qmsg <span style='color:#111;'>2.07KB</span>","children":null,"spread":false},{"title":"counter16.cmp.kpt <span style='color:#111;'>340B</span>","children":null,"spread":false},{"title":"counter16.(0).cnf.hdb <span style='color:#111;'>1.10KB</span>","children":null,"spread":false},{"title":"prev_cmp_counter16.fit.qmsg <span style='color:#111;'>39.44KB</span>","children":null,"spread":false},{"title":"counter16.cmp2.ddb <span style='color:#111;'>38.31KB</span>","children":null,"spread":false},{"title":"counter16.cmp0.ddb <span style='color:#111;'>38.45KB</span>","children":null,"spread":false},{"title":"counter16.cmp.cdb <span style='color:#111;'>1.42KB</span>","children":null,"spread":false},{"title":"counter16.cmp.hdb <span style='color:#111;'>6.03KB</span>","children":null,"spread":false},{"title":"counter16.map.logdb <span style='color:#111;'>4B</span>","children":null,"spread":false},{"title":"counter16.cmp.rdb <span style='color:#111;'>11.74KB</span>","children":null,"spread":false},{"title":"counter16.cbx.xml <span style='color:#111;'>91B</span>","children":null,"spread":false},{"title":"counter16.rpp.qmsg <span style='color:#111;'>1.77KB</span>","children":null,"spread":false},{"title":"counter16.hier_info <span style='color:#111;'>324B</span>","children":null,"spread":false},{"title":"counter16.sld_design_entry.sci <span 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