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上传时间:2015/4/19 22:41:25
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verilogRTL级代码编写指点(20篇精华文章)
verilogRTL级代码编写指点(20篇精华文章)目录:ActelHDLCodingStyleGuide;
AdvancedHigh-levelHDLDesignTechniquesforProgrammableLogic;
DesigningSafeVerilogStateMachineswithSynplify;
fpga优秀设计的十条戒律;
GuidetoHDLCodingStylesforSynthesis;
IEEEP1364.1_IEEEStandardforVerilogRegisterTransferLevelSynthesis;
IEEEP1364.1D1.4_DraftStandardforVerilogRTLSynthesis;
NonblockingAssignmentsinVerilogSynthesis,CodingStylesThatKill!;
PracticalFSMAnalysisforVerilog;
Re-timingforPerformanceImprovementinFPGADesigns;
RTLCodingStylesThatYieldSimulationandSynthesisMismatches;
StateMachineCodingStylesforSynthesis;
StatemachinedesigntechniquesforVerilogandVHDL;
SynthesisandSimulationDesignGuide;
TheVerilogGoldenReferenceGuide;
VerilogCodingStyleforEfficientDigitalDesign;
VerilogHDLCoding(Motorola);
VerilogHDLSynthesisAPracticalPrimer;
Xilinx:HDLCodingStyle;
可综合的Verilog语法(剑桥大学,影印)。
本软件ID:3902119