[{"title":"(4个子文件2.2MB)verilog实现求对数(log)","children":[{"title":"log_cordic.v <span style='color:#111;'>22.08KB</span>","children":null,"spread":false},{"title":"cordic_cell_log.v <span style='color:#111;'>984B</span>","children":null,"spread":false},{"title":"基于CORDIC的反双曲正切函数的FPGA实现.pdf <span style='color:#111;'>1.01MB</span>","children":null,"spread":false},{"title":"基于FPGA的自然对数变换器的设计与实现.pdf <span style='color:#111;'>1.32MB</span>","children":null,"spread":false}],"spread":true}]