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使用quartusii设计秒表

上传者: yuan732770755 | 上传时间:2024/8/31 21:10:14 | 文件大小:137KB | 文件类型:rar
使用quartusii设计秒表
设计的综合性环境,也是适合SOPC的最全面的设计环境。
它拥有现场可编程门阵列(FPGA)和复杂可编程逻辑器件(CPLD)设计...本文以QuartusII4.0为设计平台,以FPGA为核心,设计了一个具体数字系统即带计时器功能的秒表系统

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评论信息

  • baidu_30993253:
    可以,能使用,看了受益匪浅!2015-10-04
  • nwpu2011300104:
    代码简洁易懂,拿来学习还是比较适合的,如果思路和注释更详细就好了2014-06-02
  • yuxun88:
    不错,绝对能用2013-09-23

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