PCI总线IP核(华为的商用).7z

[{"title":"（24个子文件19KB）PCI总线IP核(华为的商用).7z","children":[{"title":"PCI总线IP核(华为的商用)","children":[{"title":"pci_core","children":[{"title":"Blocks","children":[{"title":"pci_parity.vhd <span style='color:#111;'>5.04KB</span>","children":null,"spread":false},{"title":"CVS","children":[{"title":"Entries <span style='color:#111;'>49B</span>","children":null,"spread":false},{"title":"Repository <span style='color:#111;'>16B</span>","children":null,"spread":false},{"title":"Root <span style='color:#111;'>13B</span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"CVS","children":[{"title":"Entries <span style='color:#111;'>61B</span>","children":null,"spread":false},{"title":"Repository <span style='color:#111;'>9B</span>","children":null,"spread":false},{"title":"Root <span style='color:#111;'>13B</span>","children":null,"spread":false}],"spread":true},{"title":"diagrams","children":[{"title":"CVS","children":[{"title":"Entries <span style='color:#111;'>46B</span>","children":null,"spread":false},{"title":"Repository <span style='color:#111;'>18B</span>","children":null,"spread":false},{"title":"Root <span style='color:#111;'>13B</span>","children":null,"spread":false}],"spread":true},{"title":"pci.dia <span style='color:#111;'>3.61KB</span>","children":null,"spread":false}],"spread":true},{"title":"vhdl_behav","children":[{"title":"Pci_lib.vhd <span style='color:#111;'>33.54KB</span>","children":null,"spread":false},{"title":"PCI.CMD <span style='color:#111;'>2.11KB</span>","children":null,"spread":false},{"title":"Test_pci.vhd <span style='color:#111;'>8.58KB</span>","children":null,"spread":false},{"title":"Ms32pci.vhd <span style='color:#111;'>37.91KB</span>","children":null,"spread":false},{"title":"CVS","children":[{"title":"Entries <span style='color:#111;'>278B</span>","children":null,"spread":false},{"title":"Repository <span style='color:#111;'>20B</span>","children":null,"spread":false},{"title":"Root <span style='color:#111;'>13B</span>","children":null,"spread":false}],"spread":true},{"title":"Tg32pci.vhd <span style='color:#111;'>66.47KB</span>","children":null,"spread":false},{"title":"readme.txt <span style='color:#111;'>1.34KB</span>","children":null,"spread":false}],"spread":true},{"title":"TestBench","children":[{"title":"CVS","children":[{"title":"Entries <span style='color:#111;'>52B</span>","children":null,"spread":false},{"title":"Repository <span style='color:#111;'>19B</span>","children":null,"spread":false},{"title":"Root <span style='color:#111;'>13B</span>","children":null,"spread":false}],"spread":true},{"title":"pci_parity_tb.vhd <span style='color:#111;'>4.88KB</span>","children":null,"spread":false}],"spread":true}],"spread":true}],"spread":true}],"spread":true}]