基于FPGA的电子密码锁程序

[{"title":"（29个子文件219KB）基于FPGA的电子密码锁程序","children":[{"title":"DigitLock-Verilog-master","children":[{"title":".gitattributes <span style='color:#111;'>65B</span>","children":null,"spread":false},{"title":"DigitLock.v <span style='color:#111;'>8.33KB</span>","children":null,"spread":false},{"title":"README.md <span style='color:#111;'>281B</span>","children":null,"spread":false},{"title":"DigitLocker","children":[{"title":"planAhead_run_2","children":[{"title":"DigitLocker.data","children":[{"title":"wt","children":[{"title":"webtalk_pa.xml <span style='color:#111;'>1.28KB</span>","children":null,"spread":false},{"title":"project.wpc <span style='color:#111;'>101B</span>","children":null,"spread":false}],"spread":true},{"title":"sources_1","children":[{"title":"fileset.xml <span style='color:#111;'>558B</span>","children":null,"spread":false}],"spread":true},{"title":"constrs_1","children":[{"title":"fileset.xml <span style='color:#111;'>535B</span>","children":null,"spread":false}],"spread":true},{"title":"sim_1","children":[{"title":"fileset.xml <span style='color:#111;'>488B</span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"DigitLocker.ppr <span style='color:#111;'>1008B</span>","children":null,"spread":false},{"title":"planAhead.jou <span style='color:#111;'>495B</span>","children":null,"spread":false},{"title":"planAhead.log <span style='color:#111;'>4.16KB</span>","children":null,"spread":false},{"title":"planAhead_run.log <span style='color:#111;'>3.53KB</span>","children":null,"spread":false}],"spread":true},{"title":"DigitLocker.xise <span style='color:#111;'>33.47KB</span>","children":null,"spread":false},{"title":"planAhead_pid604.debug <span style='color:#111;'>3.63KB</span>","children":null,"spread":false},{"title":"locker_top.ucf <span style='color:#111;'>845B</span>","children":null,"spread":false},{"title":"planAhead_pid2916.debug <span style='color:#111;'>3.63KB</span>","children":null,"spread":false},{"title":"DigitLocker.v <span style='color:#111;'>8.71KB</span>","children":null,"spread":false},{"title":"pa.fromHdl.tcl <span style='color:#111;'>637B</span>","children":null,"spread":false},{"title":"planAhead_run_1","children":[{"title":"DigitLocker.data","children":[{"title":"wt","children":[{"title":"webtalk_pa.xml <span style='color:#111;'>1.28KB</span>","children":null,"spread":false},{"title":"project.wpc <span style='color:#111;'>101B</span>","children":null,"spread":false}],"spread":false},{"title":"sources_1","children":[{"title":"fileset.xml <span style='color:#111;'>558B</span>","children":null,"spread":false}],"spread":false},{"title":"constrs_1","children":[{"title":"fileset.xml <span style='color:#111;'>535B</span>","children":null,"spread":false}],"spread":false},{"title":"sim_1","children":[{"title":"fileset.xml <span style='color:#111;'>488B</span>","children":null,"spread":false}],"spread":false}],"spread":true},{"title":"DigitLocker.ppr <span style='color:#111;'>1008B</span>","children":null,"spread":false},{"title":"planAhead.jou <span style='color:#111;'>494B</span>","children":null,"spread":false},{"title":"planAhead.log <span style='color:#111;'>4.16KB</span>","children":null,"spread":false},{"title":"planAhead_run.log <span style='color:#111;'>3.53KB</span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":".gitignore <span style='color:#111;'>1.24KB</span>","children":null,"spread":false},{"title":"DigitLock.pdf <span style='color:#111;'>195.77KB</span>","children":null,"spread":false}],"spread":true}],"spread":true}]