[{"title":"(49个子文件203KB)verilog流水线多周期CPU设计","children":[{"title":"27组CPU实验","children":[{"title":"流水线结构图.jpg <span style='color:#111;'>392.86KB</span>","children":null,"spread":false},{"title":"27组多周期code","children":[{"title":"cu.v <span style='color:#111;'>12.84KB</span>","children":null,"spread":false},{"title":"ALU.v <span style='color:#111;'>1.34KB</span>","children":null,"spread":false},{"title":"mux4-pc2.v <span style='color:#111;'>753B</span>","children":null,"spread":false},{"title":"mux2-wd.v <span style='color:#111;'>611B</span>","children":null,"spread":false},{"title":"BagDec.v <span style='color:#111;'>1.13KB</span>","children":null,"spread":false},{"title":"KD_CPU.v <span style='color:#111;'>4.52KB</span>","children":null,"spread":false},{"title":"register-a.v <span style='color:#111;'>544B</span>","children":null,"spread":false},{"title":"mem-data.v <span style='color:#111;'>727B</span>","children":null,"spread":false},{"title":"mux4.v <span style='color:#111;'>1.29KB</span>","children":null,"spread":false},{"title":"BagEnc.v <span style='color:#111;'>764B</span>","children":null,"spread":false},{"title":"mux-wr.v <span style='color:#111;'>478B</span>","children":null,"spread":false},{"title":"register-b.v <span style='color:#111;'>547B</span>","children":null,"spread":false},{"title":"TESTBENCH.v <span style='color:#111;'>2.38KB</span>","children":null,"spread":false},{"title":"ModDiv.v <span style='color:#111;'>965B</span>","children":null,"spread":false},{"title":"register-ir.v <span style='color:#111;'>1.40KB</span>","children":null,"spread":false},{"title":"GR.v <span style='color:#111;'>6.45KB</span>","children":null,"spread":false},{"title":"register-reg1.v <span style='color:#111;'>556B</span>","children":null,"spread":false},{"title":"register-allu.v <span style='color:#111;'>553B</span>","children":null,"spread":false},{"title":"mux2-alu1.v <span style='color:#111;'>474B</span>","children":null,"spread":false},{"title":"mem.v <span style='color:#111;'>949B</span>","children":null,"spread":false},{"title":"pc.v <span style='color:#111;'>1009B</span>","children":null,"spread":false}],"spread":false},{"title":"27组流水线code","children":[{"title":"ALU.v <span style='color:#111;'>1.06KB</span>","children":null,"spread":false},{"title":"pc_reg.v <span style='color:#111;'>487B</span>","children":null,"spread":false},{"title":"LOAD_USE.v <span style='color:#111;'>1.13KB</span>","children":null,"spread":false},{"title":"extend.v <span style='color:#111;'>495B</span>","children":null,"spread":false},{"title":"ID_EX.v <span style='color:#111;'>1.45KB</span>","children":null,"spread":false},{"title":"KD_Pipeline.v <span style='color:#111;'>7.05KB</span>","children":null,"spread":false},{"title":"divider_unit.v <span style='color:#111;'>329B</span>","children":null,"spread":false},{"title":"mux4.v <span style='color:#111;'>530B</span>","children":null,"spread":false},{"title":"EX_MEM.v <span style='color:#111;'>1.63KB</span>","children":null,"spread":false},{"title":"extend26.v <span style='color:#111;'>286B</span>","children":null,"spread":false},{"title":"mux2.v <span style='color:#111;'>385B</span>","children":null,"spread":false},{"title":"data_memory.v <span style='color:#111;'>1.44KB</span>","children":null,"spread":false},{"title":"Forwording_unit.v <span style='color:#111;'>1.41KB</span>","children":null,"spread":false},{"title":"testbanch.v <span style='color:#111;'>2.12KB</span>","children":null,"spread":false},{"title":"Control_Conflict.v <span style='color:#111;'>4.64KB</span>","children":null,"spread":false},{"title":"ALU_ctr.v <span style='color:#111;'>515B</span>","children":null,"spread":false},{"title":"GR.v <span style='color:#111;'>4.68KB</span>","children":null,"spread":false},{"title":"adder.v <span style='color:#111;'>278B</span>","children":null,"spread":false},{"title":"MEM_WB.v <span style='color:#111;'>1.11KB</span>","children":null,"spread":false},{"title":"CU.v <span style='color:#111;'>4.49KB</span>","children":null,"spread":false},{"title":"abnormitycontrol.v <span style='color:#111;'>1.26KB</span>","children":null,"spread":false},{"title":"PC_adder.v <span style='color:#111;'>345B</span>","children":null,"spread":false},{"title":"pc.v <span style='color:#111;'>494B</span>","children":null,"spread":false},{"title":"IF_ID.v <span style='color:#111;'>921B</span>","children":null,"spread":false},{"title":"Ins_Mem.v <span style='color:#111;'>322B</span>","children":null,"spread":false},{"title":"divider.v <span style='color:#111;'>5.23KB</span>","children":null,"spread":false}],"spread":false},{"title":"多周期结构图.JPG <span style='color:#111;'>127.86KB</span>","children":null,"spread":false}],"spread":true}],"spread":true}]