基于STM32F334的buck电路开关电源的PCB版图

[{"title":"（60个子文件12.5MB）基于STM32F334的buck电路开关电源的PCB版图","children":[{"title":"STM32F334buck","children":[{"title":"DC-DC.PcbDoc <span style='color:#111;'>2.52MB</span>","children":null,"spread":false},{"title":"History","children":[{"title":"PcbLib1.~(3).PcbLib.Zip <span style='color:#111;'>531.88KB</span>","children":null,"spread":false},{"title":"DC-DC.~(3).PcbDoc.Zip <span style='color:#111;'>1.72MB</span>","children":null,"spread":false},{"title":"stm32f334_BUCK.~(1).PrjPCB.Zip <span style='color:#111;'>3.99KB</span>","children":null,"spread":false},{"title":"DC-DC.~(5).SchDoc.Zip <span style='color:#111;'>52.43KB</span>","children":null,"spread":false},{"title":"PcbLib1.~(2).PcbLib.Zip <span style='color:#111;'>506.93KB</span>","children":null,"spread":false},{"title":"stm32f334_BUCK.~(5).PrjPCB.Zip <span style='color:#111;'>4.38KB</span>","children":null,"spread":false},{"title":"DC-DC.~(2).SchDoc.Zip <span style='color:#111;'>26.18KB</span>","children":null,"spread":false},{"title":"PcbLib1.~(1).PcbLib.Zip <span style='color:#111;'>6.97KB</span>","children":null,"spread":false},{"title":"Schlib1.~(1).SchLib.Zip <span style='color:#111;'>1.08KB</span>","children":null,"spread":false},{"title":"PP_SCHlib_Altium.~(1).SchLib.Zip <span style='color:#111;'>114.40KB</span>","children":null,"spread":false},{"title":"Schlib1.~(2).SchLib.Zip <span style='color:#111;'>1.61KB</span>","children":null,"spread":false},{"title":"stm32f334_BUCK.~(6).PrjPCB.Zip <span style='color:#111;'>4.38KB</span>","children":null,"spread":false},{"title":"stm32f334_BUCK.~(4).PrjPCB.Zip <span style='color:#111;'>4.38KB</span>","children":null,"spread":false},{"title":"DC-DC.~(2).PcbDoc.Zip <span style='color:#111;'>13.77KB</span>","children":null,"spread":false},{"title":"DC-DC.~(1).PcbDoc.Zip <span style='color:#111;'>13.72KB</span>","children":null,"spread":false},{"title":"DC-DC.~(4).SchDoc.Zip <span style='color:#111;'>53.09KB</span>","children":null,"spread":false},{"title":"Schlib1.~(3).SchLib.Zip <span style='color:#111;'>1.77KB</span>","children":null,"spread":false},{"title":"PP_PCBlib_Altium.~(1).PCBLIB.Zip <span style='color:#111;'>3.47MB</span>","children":null,"spread":false},{"title":"DC-DC.~(1).SchDoc.Zip <span style='color:#111;'>1.42KB</span>","children":null,"spread":false},{"title":"stm32f334_BUCK.~(3).PrjPCB.Zip <span style='color:#111;'>4.23KB</span>","children":null,"spread":false},{"title":"DC-DC.~(3).SchDoc.Zip <span style='color:#111;'>71.90KB</span>","children":null,"spread":false}],"spread":false},{"title":"PP_PCBlib_Altium.PCBLIB <span style='color:#111;'>4.52MB</span>","children":null,"spread":false},{"title":"stm32f334_BUCK.OutJob <span style='color:#111;'>9.28KB</span>","children":null,"spread":false},{"title":"PcbLib1.PcbLib <span style='color:#111;'>576.00KB</span>","children":null,"spread":false},{"title":"DC-DC.PcbDoc.htm <span style='color:#111;'>5.20KB</span>","children":null,"spread":false},{"title":"PP_SCHlib_Altium.SchLib <span style='color:#111;'>590.50KB</span>","children":null,"spread":false},{"title":"stm32f334_BUCK.PrjPCBStructure <span style='color:#111;'>47B</span>","children":null,"spread":false},{"title":"DC-DC.SchDoc <span style='color:#111;'>561.00KB</span>","children":null,"spread":false},{"title":"stm32f334_BUCK.PrjPCB <span style='color:#111;'>39.81KB</span>","children":null,"spread":false},{"title":"ProjectLogsforstm32f334_BUCK","children":[{"title":"DC-DCSCHECO2018-3-1612-17-03.LOG <span style='color:#111;'>6.49KB</span>","children":null,"spread":false},{"title":"DC-DCSCHECO2018-3-1916-23-31.LOG <span style='color:#111;'>264B</span>","children":null,"spread":false},{"title":"DC-DCPCBECO2018-3-1915-01-20.LOG <span style='color:#111;'>21.04KB</span>","children":null,"spread":false},{"title":"DC-DCSCHECO2018-3-1915-01-04.LOG <span style='color:#111;'>0B</span>","children":null,"spread":false},{"title":"DC-DCPCBECO2018-3-1916-35-15.LOG <span style='color:#111;'>402B</span>","children":null,"spread":false},{"title":"DC_DCPCB1PCBECO2018-3-1916-09-12.LOG <span style='color:#111;'>2.46KB</span>","children":null,"spread":false},{"title":"DC-DCPCBECO2018-3-1916-24-25.LOG <span style='color:#111;'>1.36KB</span>","children":null,"spread":false},{"title":"DC-DCPCBECO2018-3-1916-41-40.LOG <span style='color:#111;'>124B</span>","children":null,"spread":false},{"title":"DC-DCSCHECO2018-3-1615-51-48.LOG <span style='color:#111;'>2.17KB</span>","children":null,"spread":false},{"title":"DC-DCSCHECO2018-3-1916-08-53.LOG <span style='color:#111;'>2.39KB</span>","children":null,"spread":false},{"title":"DC-DCPCBECO2018-3-1915-06-22.LOG <span style='color:#111;'>21.16KB</span>","children":null,"spread":false},{"title":"DC-DCSCHECO2018-3-1913-54-36.LOG <span style='color:#111;'>0B</span>","children":null,"spread":false},{"title":"DC_DCPCB1PCBECO2018-3-1915-43-48.LOG <span style='color:#111;'>21.41KB</span>","children":null,"spread":false},{"title":"DC-DCSCHECO2018-3-1613-51-49.LOG <span style='color:#111;'>2.82KB</span>","children":null,"spread":false},{"title":"DC-DCPCBECO2018-3-1916-35-59.LOG <span style='color:#111;'>130B</span>","children":null,"spread":false},{"title":"DC-DCPCBECO2018-3-1916-36-26.LOG <span style='color:#111;'>27.43KB</span>","children":null,"spread":false},{"title":"DC-DCSCHECO2018-3-1913-23-17.LOG <span style='color:#111;'>0B</span>","children":null,"spread":false},{"title":"DC-DCPCBECO2018-3-1915-37-58.LOG <span style='color:#111;'>741B</span>","children":null,"spread":false},{"title":"DC-DCSCHECO2018-3-1613-59-07.LOG <span style='color:#111;'>544B</span>","children":null,"spread":false},{"title":"DC-DCSCHECO2018-3-1613-52-47.LOG <span style='color:#111;'>136B</span>","children":null,"spread":false},{"title":"DC-DCSCHECO2018-3-1617-31-57.LOG <span style='color:#111;'>8.40KB</span>","children":null,"spread":false},{"title":"DC-DCSCHECO2018-3-1914-00-16.LOG <span style='color:#111;'>0B</span>","children":null,"spread":false},{"title":"DC-DCSCHECO2018-3-1613-50-46.LOG <span style='color:#111;'>2.82KB</span>","children":null,"spread":false},{"title":"DC-DCPCBECO2018-3-1916-29-25.LOG <span style='color:#111;'>590B</span>","children":null,"spread":false},{"title":"DC-DCPCBECO2018-3-1916-26-55.LOG <span style='color:#111;'>66B</span>","children":null,"spread":false},{"title":"DC-DCPCBECO2018-3-1916-12-48.LOG <span style='color:#111;'>21.41KB</span>","children":null,"spread":false},{"title":"DC-DCPCBECO2018-3-1915-23-12.LOG <span style='color:#111;'>21.33KB</span>","children":null,"spread":false}],"spread":false},{"title":"Schlib1.SchLib <span style='color:#111;'>7.50KB</span>","children":null,"spread":false},{"title":"__Previews","children":[{"title":"DC-DC.SchDocPreview <span style='color:#111;'>97.42KB</span>","children":null,"spread":false},{"title":"DC-DC.PcbDocPreview <span style='color:#111;'>44.90KB</span>","children":null,"spread":false}],"spread":true}],"spread":false}],"spread":true}]