[{"title":"(3个子文件538KB)CSD编码乘法器的设计以及FPGA实现","children":[{"title":"CSD","children":[{"title":"基于FPGA的CSD编码乘法器.pdf <span style='color:#111;'>108.89KB</span>","children":null,"spread":false},{"title":"基于CSD编码的FIR数字滤波器优化设计.pdf <span style='color:#111;'>283.65KB</span>","children":null,"spread":false},{"title":"基于CSD编码的高速乘法器IP设计.pdf <span style='color:#111;'>155.04KB</span>","children":null,"spread":false}],"spread":true}],"spread":true}]