xilinxdds

[{"title":"（9个子文件7KB）xilinxdds","children":[{"title":"dds_verilog","children":[{"title":"src","children":[{"title":"DDS.V <span style='color:#111;'>4.39KB</span>","children":null,"spread":false},{"title":"LOADPW.V <span style='color:#111;'>2.89KB</span>","children":null,"spread":false},{"title":"PHASEA.V <span style='color:#111;'>3.12KB</span>","children":null,"spread":false},{"title":"LOADFW.V <span style='color:#111;'>3.62KB</span>","children":null,"spread":false},{"title":"PHASEMOD.V <span style='color:#111;'>2.52KB</span>","children":null,"spread":false},{"title":"SINLUP.V <span style='color:#111;'>3.34KB</span>","children":null,"spread":false},{"title":"fast_adder8b.v <span style='color:#111;'>514B</span>","children":null,"spread":false},{"title":"ROMTAB.V <span style='color:#111;'>4.35KB</span>","children":null,"spread":false},{"title":"fast_adder4b.v <span style='color:#111;'>465B</span>","children":null,"spread":false}],"spread":true}],"spread":true}],"spread":true}]