FPGA数字电子系统设计与开发实例导航(随书源代码)

[{"title":"（59个子文件1.62MB）FPGA数字电子系统设计与开发实例导航(随书源代码)","children":[{"title":"Chapter6Sample","children":[{"title":"USB","children":[{"title":"Driver","children":[{"title":"exe","children":[{"title":"Test_USBSoftLock.stc <span style='color:#111;'>50B</span>","children":null,"spread":false},{"title":"Debug","children":null,"spread":false}],"spread":true},{"title":"dirs <span style='color:#111;'>15B</span>","children":null,"spread":false},{"title":"sys","children":[{"title":"USBSoftLock.stc <span style='color:#111;'>44B</span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"Firmware","children":[{"title":"DeviceTranseiver.jhd <span style='color:#111;'>25B</span>","children":null,"spread":false},{"title":"Firmware.ptf <span style='color:#111;'>33B</span>","children":null,"spread":false},{"title":"automake.log <span style='color:#111;'>0B</span>","children":null,"spread":false},{"title":"__projnav","children":null,"spread":false},{"title":"FrequencyDivider.jhd <span style='color:#111;'>25B</span>","children":null,"spread":false},{"title":"EdgeController.jhd <span style='color:#111;'>23B</span>","children":null,"spread":false},{"title":"RequestHandler.jhd <span style='color:#111;'>23B</span>","children":null,"spread":false},{"title":"IOSwitch.jhd <span style='color:#111;'>17B</span>","children":null,"spread":false}],"spread":true},{"title":"Application","children":[{"title":"res","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"使用说明.txt <span style='color:#111;'>49B</span>","children":null,"spread":false}],"spread":true},{"title":"Chapter5Sample","children":[{"title":"使用说明.txt <span style='color:#111;'>49B</span>","children":null,"spread":false},{"title":"UART","children":[{"title":"automake.log <span style='color:#111;'>0B</span>","children":null,"spread":false},{"title":"__projnav","children":null,"spread":false},{"title":"parity_verifier.jhd <span style='color:#111;'>24B</span>","children":null,"spread":false},{"title":"detector.jhd <span style='color:#111;'>17B</span>","children":null,"spread":false},{"title":"uart_core.jhd <span style='color:#111;'>18B</span>","children":null,"spread":false},{"title":"switch.jhd <span style='color:#111;'>15B</span>","children":null,"spread":false},{"title":"counter.jhd <span style='color:#111;'>16B</span>","children":null,"spread":false},{"title":"baudrate_generator.jhd <span style='color:#111;'>27B</span>","children":null,"spread":false},{"title":"shift_register.jhd <span style='color:#111;'>23B</span>","children":null,"spread":false},{"title":"switch_bus.jhd <span style='color:#111;'>19B</span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"Chapter8Sample","children":[{"title":"使用说明.txt <span style='color:#111;'>49B</span>","children":null,"spread":false},{"title":"vga","children":[{"title":"automake.log <span style='color:#111;'>0B</span>","children":null,"spread":false},{"title":"__projnav","children":null,"spread":false},{"title":"vga_enh_top_vhdl.prj <span style='color:#111;'>0B</span>","children":null,"spread":false},{"title":"vga_enh_top.lso <span style='color:#111;'>6B</span>","children":null,"spread":false},{"title":"prjname.lso <span style='color:#111;'>6B</span>","children":null,"spread":false},{"title":"timescale.v <span style='color:#111;'>25B</span>","children":null,"spread":false},{"title":"xst","children":[{"title":"work","children":[{"title":"vlg4D","children":null,"spread":false},{"title":"vlg5F","children":null,"spread":false},{"title":"vlg04","children":null,"spread":false},{"title":"vlg6A","children":null,"spread":false},{"title":"vlg07","children":null,"spread":false},{"title":"vlg59","children":null,"spread":false},{"title":"vlg53","children":null,"spread":false},{"title":"vlg5D","children":null,"spread":false},{"title":"vlg34","children":null,"spread":false},{"title":"vlg05","children":null,"spread":false},{"title":"vlg7B","children":null,"spread":false}],"spread":false}],"spread":true}],"spread":true}],"spread":true},{"title":"Chapter4Sample","children":[{"title":"使用说明.txt <span style='color:#111;'>49B</span>","children":null,"spread":false},{"title":"I2C","children":[{"title":"automake.log <span style='color:#111;'>0B</span>","children":null,"spread":false},{"title":"__projnav","children":null,"spread":false},{"title":"i2c_master_bit_ctrl_vhdl.prj <span style='color:#111;'>0B</span>","children":null,"spread":false},{"title":"i2c_master_top.lso <span style='color:#111;'>6B</span>","children":null,"spread":false},{"title":"i2c_master_bit_ctrl.lso <span style='color:#111;'>6B</span>","children":null,"spread":false},{"title":"prjname.lso <span style='color:#111;'>6B</span>","children":null,"spread":false},{"title":"i2c_master_top_vhdl.prj <span style='color:#111;'>0B</span>","children":null,"spread":false},{"title":"i2c_master_byte_ctrl.lso <span style='color:#111;'>6B</span>","children":null,"spread":false},{"title":"i2c_master_bit_ctrl.prj <span style='color:#111;'>36B</span>","children":null,"spread":false},{"title":"work","children":[{"title":"glbl","children":null,"spread":false},{"title":"i2c_slave_model","children":null,"spread":false}],"spread":false},{"title":"timescale.v <span style='color:#111;'>23B</span>","children":null,"spread":false},{"title":"i2c_master_byte_ctrl_vhdl.prj <span style='color:#111;'>0B</span>","children":null,"spread":false},{"title":"xst","children":[{"title":"work","children":[{"title":"vlg07","children":null,"spread":false},{"title":"vlg5C","children":null,"spread":false},{"title":"vlg67","children":null,"spread":false}],"spread":false}],"spread":false}],"spread":false}],"spread":true},{"title":"Chapter10Sample","children":[{"title":"使用说明.txt <span style='color:#111;'>73B</span>","children":null,"spread":false}],"spread":true},{"title":"Chapter9Sample","children":[{"title":"使用说明.txt <span style='color:#111;'>49B</span>","children":null,"spread":false},{"title":"canbus","children":[{"title":"can_top.lso <span style='color:#111;'>6B</span>","children":null,"spread":false},{"title":"automake.log <span style='color:#111;'>0B</span>","children":null,"spread":false},{"title":"can_register_asyn_syn_vhdl.prj <span style='color:#111;'>0B</span>","children":null,"spread":false},{"title":"__projnav","children":null,"spread":false},{"title":"can_fifo_vhdl.prj <span style='color:#111;'>0B</span>","children":null,"spread":false},{"title":"can_registers_vhdl.prj <span style='color:#111;'>0B</span>","children":null,"spread":false},{"title":"can_fifo.lso <span style='color:#111;'>6B</span>","children":null,"spread":false},{"title":"can_register_asyn_syn.prj <span style='color:#111;'>38B</span>","children":null,"spread":false},{"title":"can_register_asyn_syn.lso <span style='color:#111;'>6B</span>","children":null,"spread":false},{"title":".untf <span style='color:#111;'>0B</span>","children":null,"spread":false},{"title":"can_top.stx <span style='color:#111;'>0B</span>","children":null,"spread":false},{"title":"prjname.lso <span style='color:#111;'>6B</span>","children":null,"spread":false},{"title":"can_top_vhdl.prj <span style='color:#111;'>0B</span>","children":null,"spread":false},{"title":"_ngo","children":null,"spread":false},{"title":"can_fifo.prj <span style='color:#111;'>25B</span>","children":null,"spread":false},{"title":"work","children":[{"title":"can_top","children":null,"spread":false},{"title":"can_registers","children":null,"spread":false},{"title":"can_testbench","children":null,"spread":false},{"title":"can_acf","children":null,"spread":false},{"title":"can_fifo","children":null,"spread":false},{"title":"can_register","children":[{"title":"_primary.dat <span style='color:#111;'>366B</span>","children":null,"spread":false}],"spread":false},{"title":"can_crc","children":null,"spread":false},{"title":"can_ibo","children":null,"spread":false},{"title":"glbl","children":null,"spread":false},{"title":"can_btl","children":null,"spread":false},{"title":"can_register_asyn_syn","children":null,"spread":false},{"title":"can_bsp","children":null,"spread":false},{"title":"can_register_asyn","children":[{"title":"_primary.dat <span style='color:#111;'>460B</span>","children":null,"spread":false}],"spread":false}],"spread":false},{"title":"can_registers.lso <span style='color:#111;'>22B</span>","children":null,"spread":false},{"title":"timescale.v <span style='color:#111;'>23B</span>","children":null,"spread":false},{"title":"xst","children":[{"title":"work","children":[{"title":"vlg70","children":null,"spread":false},{"title":"vlg49","children":null,"spread":false},{"title":"vlg01","children":null,"spread":false},{"title":"vlg42","children":null,"spread":false},{"title":"vlg5E","children":null,"spread":false},{"title":"vlg31","children":null,"spread":false},{"title":"vlg4F","children":null,"spread":false},{"title":"vlg48","children":null,"spread":false},{"title":"vlg43","children":null,"spread":false},{"title":"vlg1B","children":null,"spread":false}],"spread":false}],"spread":false}],"spread":false}],"spread":true},{"title":"Chapter7Sample","children":[{"title":"使用说明.txt <span style='color:#111;'>73B</span>","children":null,"spread":false},{"title":"timescale.v <span style='color:#111;'>21B</span>","children":null,"spread":false}],"spread":true}],"spread":true}]