首页 开发技术 硬件开发     /    AlteraCycloneIIEP2C35F672C8+SDRAM+SRAM+FLASH核心板ALTIUM设计硬件原理图+PCB+封装库.zip

AlteraCycloneIIEP2C35F672C8+SDRAM+SRAM+FLASH核心板ALTIUM设计硬件原理图+PCB+封装库.zip

上传者: GJZGRB | 上传时间:2023/8/2 3:20:02 | 文件大小:4.77MB | 文件类型:ZIP
AlteraCycloneIIEP2C35F672C8+SDRAM+SRAM+FLASH核心板ALTIUM设计硬件原理图+PCB+封装库.zip
AlteraCycloneIIEP2C35F672C8+SDRAM+SRAM+FLASH核心板ALTIUM设计硬件原理图+PCB+封装库,采用8层板设计,板子大小为113x82mm,双面布局布线。
主要器件为FPGAEP2C35F672C8,FLAHS29GL256N11FFIV10,SDRAMMT48LC16M16A2TG,256Mbit,K6R4016V1D-TC10T,256Kx16-BitSRAM,等AltiumDesigner设计的工程文件,包括完整的原理图、PCB文件,可以用Altium(AD)软件打开或修改,可作为你产品设计的参考。

文件下载

资源详情

[{"title":"(71个子文件4.77MB)AlteraCycloneIIEP2C35F672C8+SDRAM+SRAM+FLASH核心板ALTIUM设计硬件原理图+PCB+封装库.zip","children":[{"title":"DB31AlteraCycloneIIF672","children":[{"title":"Bypass_FPGA_3V3.SchDoc <span style='color:#111;'>264.50KB</span>","children":null,"spread":false},{"title":"FPGA_NonIO.SchDocPreview <span style='color:#111;'>128.77KB</span>","children":null,"spread":false},{"title":"DB31_Hardware_Kit.SchDoc <span style='color:#111;'>15.50KB</span>","children":null,"spread":false},{"title":"DB31_Panel.PcbDoc <span style='color:#111;'>1.13MB</span>","children":null,"spread":false},{"title":"DEVICES.SchDocPreview <span style='color:#111;'>68.16KB</span>","children":null,"spread":false},{"title":"DEVICES.SchDoc <span style='color:#111;'>26.50KB</span>","children":null,"spread":false},{"title":"DB31_Top.SchDocPreview <span style='color:#111;'>33.18KB</span>","children":null,"spread":false},{"title":"Bypass_FPGA_3V3.SchDocPreview <span style='color:#111;'>55.99KB</span>","children":null,"spread":false},{"title":"FPGA.SCHDOC <span style='color:#111;'>2.91MB</span>","children":null,"spread":false},{"title":"PSU.SCHDOCPreview <span style='color:#111;'>39.75KB</span>","children":null,"spread":false},{"title":"Dependencies","children":[{"title":"DeviceSheets","children":[{"title":"1WB_DS2406_EPROM.SchDoc <span style='color:#111;'>27.00KB</span>","children":null,"spread":false},{"title":"SRAM_256Kx16_TSOP44.SchDocPreview <span style='color:#111;'>66.67KB</span>","children":null,"spread":false},{"title":"FLASH_S29GL256N11FFIV10_16Mx16.SchDoc <span style='color:#111;'>82.50KB</span>","children":null,"spread":false},{"title":"SRAM_256Kx16_TSOP44.SchDoc <span style='color:#111;'>73.50KB</span>","children":null,"spread":false},{"title":"PSU_MAX1831_1V2_ALT.SchDoc <span style='color:#111;'>78.50KB</span>","children":null,"spread":false},{"title":"DB_Bypass.SchDoc <span style='color:#111;'>24.00KB</span>","children":null,"spread":false},{"title":"DB_MotherBoardConnectors.SchDocPreview <span style='color:#111;'>164.03KB</span>","children":null,"spread":false},{"title":"FLASH_S29GL256N11FFIV10_16Mx16.Harness <span style='color:#111;'>68B</span>","children":null,"spread":false},{"title":"DB_MotherBoardConnectors.SchDoc <span style='color:#111;'>326.48KB</span>","children":null,"spread":false},{"title":"PSU_MAX1831_1V2_ALT.SchDocPreview <span style='color:#111;'>49.80KB</span>","children":null,"spread":false},{"title":"NB2_CommonMemory_Termination.Harness <span style='color:#111;'>200B</span>","children":null,"spread":false},{"title":"DB_LEDS.SchDocPreview <span style='color:#111;'>38.09KB</span>","children":null,"spread":false},{"title":"SRAM_256Kx16_TSOP44.Harness <span style='color:#111;'>54B</span>","children":null,"spread":false},{"title":"DB_MotherBoardConnectors.Harness <span style='color:#111;'>445B</span>","children":null,"spread":false},{"title":"DB_MOUNTS.SchDoc <span style='color:#111;'>27.00KB</span>","children":null,"spread":false},{"title":"NB2_CommonMemory.Harness <span style='color:#111;'>405B</span>","children":null,"spread":false},{"title":"SDRAM_MT48LC16M16A2TG_16Mx32.SchDocPreview <span style='color:#111;'>99.44KB</span>","children":null,"spread":false},{"title":"DB_Common.SchDoc <span style='color:#111;'>30.50KB</span>","children":null,"spread":false},{"title":"DB_LEDS.SchDoc <span style='color:#111;'>36.50KB</span>","children":null,"spread":false},{"title":"NB2_CommonMemory_Termination.SchDoc <span style='color:#111;'>64.50KB</span>","children":null,"spread":false},{"title":"DB_MOUNTS.SchDocPreview <span style='color:#111;'>30.47KB</span>","children":null,"spread":false},{"title":"SRAM_256Kx32_TSOP44_1.SchDoc <span style='color:#111;'>129.50KB</span>","children":null,"spread":false},{"title":"SRAM_256Kx32_TSOP44_1.SchDocPreview <span style='color:#111;'>89.81KB</span>","children":null,"spread":false},{"title":"SDRAM_MT48LC16M16A2TG_16Mx32.Harness <span style='color:#111;'>91B</span>","children":null,"spread":false},{"title":"__Previews","children":[{"title":"PSU_MAX1831_1V2_ALT.SchDocPreview <span style='color:#111;'>93.11KB</span>","children":null,"spread":false},{"title":"DB_MOUNTS.SchDocPreview <span style='color:#111;'>56.17KB</span>","children":null,"spread":false},{"title":"FLASH_S29GL256N11FFIV10_16Mx16.SchDocPreview <span style='color:#111;'>132.88KB</span>","children":null,"spread":false},{"title":"NB2_CommonMemory_Termination.SchDocPreview <span style='color:#111;'>233.22KB</span>","children":null,"spread":false},{"title":"FLASH_S29GL256N11FFIV10_16Mx16.HarnessPreview <span style='color:#111;'>19.46KB</span>","children":null,"spread":false}],"spread":false},{"title":"NB2_CommonMemory.SchDoc <span style='color:#111;'>28.21KB</span>","children":null,"spread":false},{"title":"FLASH_S29GL256N11FFIV10_16Mx16.SchDocPreview <span style='color:#111;'>72.80KB</span>","children":null,"spread":false},{"title":"DB_Common.SchDocPreview <span style='color:#111;'>103.73KB</span>","children":null,"spread":false},{"title":"NB2_CommonMemory.SchDocPreview <span style='color:#111;'>70.34KB</span>","children":null,"spread":false},{"title":"1WB_DS2406_EPROM.SchDocPreview <span style='color:#111;'>31.73KB</span>","children":null,"spread":false},{"title":"SDRAM_MT48LC16M16A2TG_16Mx32.SchDoc <span style='color:#111;'>113.50KB</span>","children":null,"spread":false},{"title":"NB2_CommonMemory_Termination.SchDocPreview <span style='color:#111;'>118.47KB</span>","children":null,"spread":false},{"title":"1WB_DS2406_EPROM.Harness <span style='color:#111;'>23B</span>","children":null,"spread":false},{"title":"SRAM_256Kx32_TSOP44_1.Harness <span style='color:#111;'>46B</span>","children":null,"spread":false},{"title":"DB_Bypass.SchDocPreview <span style='color:#111;'>33.90KB</span>","children":null,"spread":false}],"spread":false}],"spread":true},{"title":"FPGA.SCHDOCPreview <span style='color:#111;'>284.52KB</span>","children":null,"spread":false},{"title":"DB31.PRJPCB <span style='color:#111;'>72.41KB</span>","children":null,"spread":false},{"title":"FPGA.Harness <span style='color:#111;'>722B</span>","children":null,"spread":false},{"title":"PSU.SCHDOC <span style='color:#111;'>37.50KB</span>","children":null,"spread":false},{"title":"DB31.PcbDocPreview <span style='color:#111;'>290.89KB</span>","children":null,"spread":false},{"title":"DB31.AnnotationPreview <span style='color:#111;'>140.33KB</span>","children":null,"spread":false},{"title":"DB31.PcbDoc.htm <span style='color:#111;'>8.49KB</span>","children":null,"spread":false},{"title":"DB31.Annotation <span style='color:#111;'>54.41KB</span>","children":null,"spread":false},{"title":"Bypass_FPGA_1V2.SCHDOC <span style='color:#111;'>140.50KB</span>","children":null,"spread":false},{"title":"DB31.Dat <span style='color:#111;'>7.82KB</span>","children":null,"spread":false},{"title":"DB31_Hardware_Kit.SchDocPreview <span style='color:#111;'>28.87KB</span>","children":null,"spread":false},{"title":"__Previews","children":[{"title":"FPGA.SCHDOCPreview <span style='color:#111;'>560.11KB</span>","children":null,"spread":false},{"title":"DB31_Hardware_Kit.SchDocPreview <span style='color:#111;'>52.42KB</span>","children":null,"spread":false}],"spread":false},{"title":"Bypass_FPGA_1V2.SCHDOCPreview <span style='color:#111;'>42.78KB</span>","children":null,"spread":false},{"title":"DB31_Panel.OutJob <span style='color:#111;'>16.46KB</span>","children":null,"spread":false},{"title":"DB31_Top.SchDoc <span style='color:#111;'>15.00KB</span>","children":null,"spread":false},{"title":"DB31.PcbLib <span style='color:#111;'>261.50KB</span>","children":null,"spread":false},{"title":"DB31_Panel.PcbDoc.htm <span style='color:#111;'>8.51KB</span>","children":null,"spread":false},{"title":"FPGA_NonIO.SchDoc <span style='color:#111;'>1.61MB</span>","children":null,"spread":false},{"title":"DB31.PcbDoc <span style='color:#111;'>5.56MB</span>","children":null,"spread":false},{"title":"DB31.PRJPCBStructure <span style='color:#111;'>5.28KB</span>","children":null,"spread":false},{"title":"DB31_Panel.PcbDocPreview <span style='color:#111;'>146.52KB</span>","children":null,"spread":false}],"spread":false}],"spread":true}]

评论信息

  • jamsebond007:
    用户下载后在一定时间内未进行评价,系统默认好评。2021-07-01

免责申明

【好快吧下载】的资源来自网友分享,仅供学习研究,请务必在下载后24小时内给予删除,不得用于其他任何用途,否则后果自负。基于互联网的特殊性,【好快吧下载】 无法对用户传输的作品、信息、内容的权属或合法性、合规性、真实性、科学性、完整权、有效性等进行实质审查;无论 【好快吧下载】 经营者是否已进行审查,用户均应自行承担因其传输的作品、信息、内容而可能或已经产生的侵权或权属纠纷等法律责任。
本站所有资源不代表本站的观点或立场,基于网友分享,根据中国法律《信息网络传播权保护条例》第二十二条之规定,若资源存在侵权或相关问题请联系本站客服人员,8686821#qq.com,请把#换成@,本站将给予最大的支持与配合,做到及时反馈和处理。关于更多版权及免责申明参见 版权及免责申明