verilogHDL实现的双电梯1-9层控制器源码+仿真+设计文档说明.zip

[{"title":"（6个子文件245KB）verilogHDL实现的双电梯1-9层控制器源码+仿真+设计文档说明.zip","children":[{"title":"控制器","children":[{"title":"设计报告.docx <span style='color:#111;'>285.26KB</span>","children":null,"spread":false},{"title":"tb.v <span style='color:#111;'>1.77KB</span>","children":null,"spread":false},{"title":"ctrl.v <span style='color:#111;'>9.62KB</span>","children":null,"spread":false},{"title":"tb2.v <span style='color:#111;'>1.10KB</span>","children":null,"spread":false},{"title":"datapath.v <span style='color:#111;'>1.08KB</span>","children":null,"spread":false},{"title":"elevator.v <span style='color:#111;'>1.22KB</span>","children":null,"spread":false}],"spread":true}],"spread":true}]