Verilog实现uart串口逻辑特率可选9600、19200、38400、1152008位数据1位校验1位停止.zip

[{"title":"（6个子文件6KB）Verilog实现uart串口逻辑特率可选9600、19200、38400、1152008位数据1位校验1位停止.zip","children":[{"title":"uart20201225","children":[{"title":"uart.v <span style='color:#111;'>1.68KB</span>","children":null,"spread":false},{"title":"fifo.v <span style='color:#111;'>1.49KB</span>","children":null,"spread":false},{"title":"Baud.v <span style='color:#111;'>810B</span>","children":null,"spread":false},{"title":"uart_tb.v <span style='color:#111;'>9.49KB</span>","children":null,"spread":false},{"title":"RX.v <span style='color:#111;'>3.06KB</span>","children":null,"spread":false},{"title":"TX.v <span style='color:#111;'>2.77KB</span>","children":null,"spread":false}],"spread":true}],"spread":true}]