Altera_stratixVGS_5sgsmd5kf40_dsp开发板cadenceorcad硬件原理图+PCB文件.zip

[{"title":"（6个子文件11.53MB）Altera_stratixVGS_5sgsmd5kf40_dsp开发板cadenceorcad硬件原理图+PCB文件.zip","children":[{"title":"stratixVGS_5sgsmd5kf40_dsp","children":[{"title":"layout","children":[{"title":"s5_pcie_devkit_revc.brd <span style='color:#111;'>27.45MB</span>","children":null,"spread":false}],"spread":true},{"title":"schematic","children":[{"title":"S5GS_DSP_C.DSN <span style='color:#111;'>6.90MB</span>","children":null,"spread":false},{"title":"allegro","children":[{"title":"pstxprt.dat <span style='color:#111;'>430.80KB</span>","children":null,"spread":false},{"title":"pstchip.dat <span style='color:#111;'>415.43KB</span>","children":null,"spread":false},{"title":"pstxnet.dat <span style='color:#111;'>939.24KB</span>","children":null,"spread":false}],"spread":true},{"title":"s5gs_dsp_c.pdf <span style='color:#111;'>1.47MB</span>","children":null,"spread":false}],"spread":true}],"spread":true}],"spread":true}]